Computer Dictionary/Burst Extended Data Out DRAM
read or write cycles are batched in bursts of four. The bursts wrap around on a four byte boundary which means that only the two least significant bits of the CAS address are modified internally to produce each address of the burst sequence. Consequently, burst EDO bus speeds will range from 40MHz to 66MHz, well above the 33MHz bus speeds that can be accomplished using Fast Page Mode or EDO DRAM.
Burst EDO was introduced sometime before May 1995.